Our team defines approaches for implementation of affordable integrated systems for high performance wireless communication at 300 GHz and above through investigation of circuit, post-CMOS processing and low-cost packaging techniques. These techniques will be demonstrated by implementing receive and transmitter chains as well as arrays for a 380-GHz whisper radio. More specifically, we will seek to improve the performance of CMOS radios (noise figure, TX power, power efficiency) to make it close or to match that fabricated using SiGe HBT and III-V devices for possible integration into the 340-GHz MIMO systems.


We investigate approaches to improve sensitivity, transmitted power and power efficiency of affordable CMOS radios in packages operating at 300-400 GHz. For receivers, a mixer-first topologies must be utilized. 2nd order subharmonic mixers utilizing anti-parallel diode connected NMOS transistor pairs at 300-400 GHz are being investigated to lower the receiver noise figure to ~10dB expected for InP HEMT LNA’s. Furthermore, use of complementary anti-parallel Schottky diode pairs in CMOS with a higher cut-off frequency and a parametric low noise amplifier will also be investigated to reduce the noise figure of receiver. The frequency plan of transmitter will be optimized for power efficiency. We also investigate the use of a reactive up-conversion mixer or a parametric amplifier and a frequency multiplier, both using MOS varactors which are inherently more power efficient than resistive mixing and frequency multiplication. Power efficiency of LO driver using reactive frequency multipliers and RF mixer combination will be co-optimized. We will characterize commonly used plastics for packaging for dielectric constant and loss between 300-400 GHz. The properties will be used to co-design the integrated circuit, antennas and package.

Working with the team led by M. Rodwell researching InP power amplifiers and low noise amplifiers, and the team led by A. Niknejad researching 140-GHz CMOS transceivers, this team is working to demonstrate energy efficiency transceivers for wireless communication operating at 300 to 400 GHz.


In the first phase of the research program, we have demonstrated 560 to 20 GHz parametric down-conversion with 4th and 8th order LO harmonic mixing. We have also taped-out 140 to 300 GHz parametric up-converters with simulated conversion gain 5 dB better than comparable conventional resistive up-converters. Furthermore, we have shown that the efficiency of on-chip patch antenna fabricated in CMOS at 300-400 GHz can be improved to above 70% by using the plastic packaging.

Team Leader

Kenneth O

Prof. Kenneth K. O is a leader in the field of high frequency CMOS electronics. He is the Director of SRC Texas Analog Center of Excellence. He received the 2014 Semiconductor Industry Association University Researcher Award for contributions to the development of devices and circuits for RF applications in CMOS. His group has generated 1.3-THz signals and detected 10-THz signals in CMOS. He and his students are working on 300-400 GHz affordable energy efficient transceivers for high data rate wireless communication.



H. S. Bakshi, P. R. Byreddy, K.O. Kenneth, A. Blanchard, Mark Lee, E. Tuncer, & W. Choi. (2019, September 24). Low-Cost Packaging of 300 GHz Integrated Circuits With an On-Chip Patch Antenna. IEEE Antennas and Wireless Propagation Letters [Online]. 18(11). Available: https://ieeexplore.ieee.org/document/8847608.

K. K. O, W. Choi, Q. Zhong, N. Sharma, & Y. Zhang (2019, August 21). Opening Terahertz for Everyday Applications.  IEEE Communications Magazine [Online]. pp. 70-76. Available: https://ieeexplore.ieee.org/document/8808165

M.J.W Rodwell, “100-340GHz Spatially Multiplexed Communications: IC, Transceiver, and Link Design,” presented at the 2019 IEEE 20th International Workshop on Signal Processing Advances in Wireless Communications (SPAWC), Cannes, France, July 2-5, 2019.

Q. Zhong, W. Choi and K. O, "Terahertz RF Front-End Employing Even-Order Subharmonic MOS Symmetric Varactor Mixers in 65-NM CMOS for Hydration Measurements at 560 GHz," 2018 IEEE Symposium on VLSI Circuits, Honolulu, HI, 2018, pp. 211-212